1769-L30ERM /A 在设计共模电感之前，首先要考察线圈须行符合以下原则：
1 >正常工作状态下，不致因通电电源电流而造成磁芯饱和。
2 >对高频干扰信号要有足够大的阻抗，且有一定的频宽，而对工作频率之信号电流有最小的阻抗。
3 >电感的温度系数应小，而分布电容宜小。
4 >直流电阻应尽量小。
5 >感应电感应尽量大，电感值需稳定。
6 >绕组间之绝缘性须满足安规要求。
共模电感器之设计步骤：
Step 0 SPEC取得：EMI允许级别，应用位置。
Step 1电感值确定。
Step 2 core材质及规格确定。
Step 3绕组匝数及线径确定。
Step 4打样
Step 5测试
设计举例
图3实际EMI滤波器
Step 0 : 如图3所示EMI滤波电路
CX = 1.0 Uf Cy = 3300PF EMI等級 : Fcc Class
Type : Ac Common Mode Choke
Step 1：电感（L）确定：
由电路图可知共模信号由L3和C2、C3组成的共模滤波器抑制，实际L3与C2和C3构成两路LC串联电路，分别吸收L和N在线的噪声。只要确定滤波电路的截止频率，也已知电容容量C，则可以下式求出电感L。
fo= 1/(2π√LC)L → 1/(2πfo)2C
通常EMI测试频宽如下：
传导干扰：150KHZ →30MHZ（注：VDE标准10KHZ - 30M）
辐射干扰：30MHZ 1GHZ
实际的滤波器无法达到理想滤波器那样陡峭的阻抗曲线，通常可将截止频率设定在50KHZ左右。在此，假设f o = 50KHZ，则
L =1/(2πfo)2C= 1/ [( 2*3.14*50000)2*3300*10-12] = 3.07mH
L1、L2、C1组成（低通）常模滤波器，线间电容有1.0uF，则常模电感为：
L = 1/ [( 2*3.14*50000)2*1*10-6] = 10.14uH
如此，可得到理论要求的电感值，若想获得更低的截止频率fo，则可进一步加大电感值，截止频率一般不低于10KHZ。理论上电感量越高对EMI抑制效果越好，但过高的电感将使截止频率更低，而实际的滤波器只能做到一定宽带，也就使高频噪声的抑制效果变差（一般开关电源的噪声成分约为5 ~10MHZ间，但也有超过10MHZ之情形）。另外，电感量愈高，则绕线匝数愈多，或CORE之ui越高，如此将造成低频阻抗增加（DCR变大）。匝数增加使分布电容也随之增大（如图4），使高频电流全部经此电容流通。过高的ui使CORE极易饱和，同时制作也极困难，成本也较高。
1769-L30ERM /A
PTQ-PDPMV1
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